CPE 201/EE 236 Lab 4

(UNR/2005 Spring)

A Complete Two-bit Adder

Introduction (5 points):

More complex functions can be built using simple logic gates. One such important function is an adder. An adder is an indispensable part of a central processing unit. Current microprocessors have the ability to add two binary numbers that are 32 digits in length. That means it is possible to add numbers that range from 0₁₀ to 4,294,967,296₁₀. The logic circuit necessary to perform this function consists of 31 full-adders and one half-adder. A half-adder has 2 inputs and 2 outputs and a full-adder have 3 inputs and 2 outputs. We are going to assemble something a little less daunting.....a circuit that will compute the sum of 2 numbers that are 2 digits in length: a 2-bit adder can show all the functionality of any n-bit adder (n > 2). This 2-bit adder circuit will consist of one half-adder and one full-adder. In this lab, we will design and implement (on both EWB and breadboard) the half and full adders.

The following EWB circuit can be downloaded and is used to demonstrate how our Two-Bit Adder works. The half-adder and the full-adder are represented by functional blocks. Changing the state of the switches determines what numbers are added (please note: following is a 2-bit adder. Our task in this lab is to implement a 1-bit half adder and a 1-bit full adder, and then combine them into a complet 2-bit adder where there are four inputs: A, B, C, D, and three outputs: E, F, G).

You can use switches to test your final Two-Bit Adder or you can use the Word Generator (click here (written by Scott) to see how to use Word Generator) as shown in the following circuit:

Objective (5 points):

One objective of this lab is to introduce students to the idea of building more complex circuits from simple building blocks (half-adders and full-adders). Another objective is to introduce an essential element of central processing units and how to design this element.

Procedure (80 points):

Design a (1-bit) half-adder that will output the sum and carry( this half adder has two inputs: two 1-bit binary numbers, and two outputs: two 1-bit binary numbers). Include the following in the lab report (using ONLY 2-input XOR and 2-input AND gates for the circuit) (10 points).
1. Minimized expressions (2 expressions) .
2. Logic diagrams.
Design a (1-bit) full-adder that will output the sum and carry (e.g. two 1-bit binary numbers for sum and carry) and that has three inputs (e.g. two 1-bit binary numbers and a carry from a previous half-adder circuit). Include the following in the lab report (using ONLY 2-input XOR, 2-input OR, and 2-input AND gates for the circuit) (10 points).
1. Truth tables (2 outputs - SUM and CARRY) .
2. Karnaugh Maps (2 maps).
3. Minimized Expressions (2 expressions).
4. Logic diagrams.
Design a fully functional 2-bit adder that will generate the sum and carry of an input that consists of two 2-bit numbers, that is, AB + CD = EFG (inputs: A, B, C, D, and outputs: E as the carry, F and G as the sum). Mark the A, B, C, D, and E, F, G in your circuit: A, C, and E should be the MSBs (Most Significant Bits); B, D, and G should be the LSBs (Least Significant Bits) (10 points).
Include the following in the lab report:

Logic diagram (using only XOR, AND, and OR gates) .

Based on the full adder logic diagram, design its schematic circuit in EWB (e.g. using 7486, 7408, and 7432 chips as shown in the following, not logic gates), and test its function by connecting the inputs with switches. Include the schematic circuit in the lab report (Please pay particular attention to the connections between the chip's pins. Connection lines should be clearly separated. You should test/verify this circuit and make sure its function is all right before going on to the implementation on your breadboard) (10 points).
Using the circuit designed in step 4, implement a fully functional 2-bit adder (a full 1-bit adder) on your breadboard using the 7486 (XOR), 7408 (AND), and 7432 (OR) chips. Show the result to the lab TA.(40 points).