CPE 201/EE 236 Lab 6

(UNR/2005 Spring)

Logic Implementations with Decoder and Multiplexer


Introduction (5 points):

An n line input decoder provides 2n minterms (outputs).  Since any Boolean function can be epressed in sum of minterms (or, sum of products), a decoder and an external OR gate can be used to form the sum of product. Thus, any combinational circuit with n inputs and m outputs can be dimplemented with an n-to-2n-line decoder and m OR gates. Refer to the textbook (pages 134-138 and p. 449) for examples and more information.

A more efficient method for implementing a Boolean function of n variables is to use a multiplexer that has n-1 selection inputs. This n-1 variables are connected to the selection inputs of the multiplexer and the remaining single variable of the function is used for the data inputs.  An example is given in the pages 144-145 of the textbook.


Objective (5 points):

      One objective of this lab is to implement a logic function with a multiplexer and inverters. Another objective is to introduce the concept of active high/low input/output through the logic function implementation with a decoder  and NAND gates.


Procedure (80 points):

1. Getting to know 74LS151 multiplexer and 74LS138 decoder (10 points):

   
                                                            6-1    6-2

2. With EWB, design a logic circuit for funciton F(A, B, C, D) = ∑(2, 3, 5, 6, 8, 9, 12, 15) with only 74151 and inverters. Include the truthtable and circuit in your lab reports (cousult p.145/textebook for design example) (10).

3. Implement the above designed circuit in your breadboard (use 7404 for the inverters) and show the results to the TA (40).

4. With EWB, design a logic circuit for funciton F(A, B, C) = ∑(0, 2, 4, 6) with only 74138 and NAND gates. Include the circuit in your lab reports (20).


-----------Be CAREFUL:  The selection order is (C B A), but our function variables are given in the order of (A, B, C) or (A, B, C, D)--------------------------


Conclusion (5 points):