CPE 201/EE 236 Lab 8

(UNR/2005 Spring)

Counter

Introduction (5 points):

Sequential switching networks have the property that the output depends not only on the present input but also on the past sequence of inputs. In effect, these networks must be able to "remember" some thing about the past history of the inputs in order to produce the present output.
Flip-flops are the most commonly used memory devices in sequential networks. Basically, a flip-flop is a memory device, which can assume one of two stable output states, which has a pair of complementary outputs, and which has one or more inputs that can cause the output state to change.

Objective (5 points):

The purpose of this lab is to introduce the D flip-flop and its use in simple sequential counting circuits.

Procedure (80 points):

1. Here is a good example of designing simple counter by Kim Martin. Learn how to use IC chips with EWB's help information ("right-click" on a chip symbol) for IC chips and/or Userful links on the lab homepage.

2. Design a counter with the repreated binary sequence: 0, 1, 2, 4, 6 with D flip flops. Including the following in your lab reports (35 points) (It would always be a good idea, in designing a sequential circuit, to begin with drawing a "state transition diagram" and creating the state table, although the diagram and original state table are NOT required in the lab report):

Transition (coded state) table)
Excitation (flip flop's inputs) table
Excitation maps
Simplified logic expressions for the flip flop inputs
Logic circuit (with D flip flops, XOR, NOT, and 3-input NAND gates) (Please note: there are different types of D flip flops and make sure the connections be correct--see the suggestions in the Procedure 1).

3. Implement the designed circuit on the breadboard and show the results to TA (35 points) using:

74175 (D flip flop)
7404 (NOT )
7486 (XOR)
7410 (3 -input NAND)

4. Re-design the above counter with T-flip flops. Include the following in your lab reports (10):