CPE 201 Digital Design

Department of Computer Science & Engineering

University of Nevada, Reno, Spring 2016

 

Course Information - Description - Prerequisites - Textbooks - Syllabus - Organization - Grading - Schedule, Notes & Assignments - Acknowledgment - ABET Criteria

 

Course Information

 

E-mail: ssunr.papers@gmail.com

Phone: (775) 784-6953

Web page: http://www.cse.unr.edu/~shamik/

Office: SEM 204 (Scrugham Engineering-Mines)

Office hours:

 

            

Deepak Tosh, dtosh@unr.edu

Lab Sections: CPE 201-1101 and CPE 201-1102

Office hours: Tuesday 12:30-1.30pm

 

Ahmet Aksoy, aksoy@nevada.unr.edu

Lab Sections: CPE 201-1103 and CPE 201-1104

Office hours: Monday 12-1pm

 

Mohammad Jafari, mo.jafari@nevada.unr.edu

Lab Sections: CPE 201-1105 and CPE 201-1106

Office hours: Thursday 3-4pm

 

Suman Bhunia, sbhunia@nevada.unr.edu

Lab Sections: None

Office hours: Thursday, 12.30pm-1.30pm

 

 

Description

Fundamentals of digital design. Topics include: number bases, binary arithmetic, Boolean logic, minimizations, combinational and sequential circuits, registers, counters, memory, programmable logic devices, register transfer.

 

Prerequisites

 

Textbooks

Required Textbooks

 

Syllabus (Tentative)

This is a tentative list of topics, subject to modification and reorganization.

 

  1. Digital Systems and Binary Numbers

 

  1. Boolean Algebra and Logic Gates

 

  1. Gate-Level Minimization

§  The Map method

§  Products-of-Sums

 

  1. Combinational Logic

 

  1. Synchronous Sequential Logic

§  Latches

§  Flip-Flops

 

  1. Registers and Counters

 

  1. Design at the Register Transfer Level (RTL)

 

 

Organization and Policies

 

Grading (Tentative)

Both grading policy and scale are subject to change.

Grading Policy

Labs

20%

Quizzes

15%

Homework

15%

Midterm Exam

25%

Final Exam

25%

 

Grading Scale (Tentative)

90% - 100%

A

80% - 89%

B, A-

65% - 79%

C, B-

50% - 64%

D, C-

Below 50%

F

Important Note: Re-grading requests can only be made within the first week after the graded assignments/tests are returned to the students.

 

Schedule (Tentative), Notes & Assignments (this will be updated as the class progresses)

This is a tentative schedule including the exam dates. It is subject to readjustment depending on the time we actually spend in class covering the topics. Slides presented in class and assignments will be posted at the WebCampus. See the acknowledgment for the course materials. Permanent reading assignment: it is assumed that you are familiar with the contents of the slides of all past meetings.

Date

Lectures

Readings & Assignments

Assignments

Quiz

Tue, Jan 19

Lecture #1: Intro. & Digital Systems and Binary Numbers (1) – Introduction & Outline

• No reading

   

Thu, Jan 21

Lecture #2: Digital Systems and Binary Numbers (2) – Number Base Representations & Number Conversions

• Mano & Ciletti, Ch. 1.2-1.4

   

Tue, Jan 26

Lecture #3: Digital Systems and Binary Numbers (3) – Complements

• Mano & Ciletti, Ch. 1.5

• Homework 1 assigned

 

Thu, Jan 28

Lecture #4: Digital Systems and Binary Numbers (4) – Signed binary, Encoding

• Mano & Ciletti, Ch. 1.6-1.7

 

 

Tu, Feb 2

Lecture #5: BCD, Binary storage & Registers, Binary logic

• Mano & Ciletti, Ch. 1.7-1.9

• Homework 1 due

• Quiz 1 (at the beginning of class)

Thu, Feb 4

Lecture #6: Boolean Algebra

• Mano & Ciletti, Ch. 2.1-2.4

• Homework 2 assigned

 

Tu, Feb 9

Lecture #7: Algebraic manipulation

• Mano & Ciletti, Ch. 2.5

   

Thu, Feb 11

Lecture #8: Canonical and Standard forms

• Mano & Ciletti, Ch. 2.6

 

• Quiz 2 (at the beginning of class)

Tu, Feb 16

Lecture #9: Gate-level minimization

• Mano & Ciletti, Ch. 3.1-3.3

   

Thu, Feb 18

Lecture #10: Don't care conditions

• Mano & Ciletti, Ch. 3.4-3.5

• Homework 2 due

• Homework 3 assigned

 

Tu, Feb 23

Lecture #11: NAND and NOR

• Mano & Ciletti, Ch. 3.6

 

• Quiz 3 (at the beginning of class)

Thu, Feb 25

Lecture #12: XOR

• Mano & Ciletti, Ch. 3.8

   

Tu, Mar 1

Lecture #13: Combinational Logic - Adder

• Mano & Ciletti, Ch. 4.1-4.6

   

Thu, Mar 3

Lecture #14: Multiplier, Decoders, Encoders

• Mano & Ciletti, Ch. 4.7, 4.9, 4.10

• Homework 3 due

• Quiz 4 (at the beginning of class)

Tu, Mar 8

Midterm Preview and Discussion

     

Thu, Mar 10

Midterm

     

Tu, Mar 15

Lecture #15: Comparators, Multiplexers, HDL

• Mano & Ciletti, Ch. 4.8, 4.11, 4.12

• Homework 4 assigned

 

Thu, Mar 17

Lecture #16: Sequential logic

• Mano & Ciletti, Ch. 5.1-5.3

   

Tu, Mar 22

Spring Break

     

Thu, Mar 24

Spring Break

     

Tu, Mar 29

Lecture #17: Flip-Flops

• Mano & Ciletti, Ch. 5.4

• Homework 4 due

• Homework 5 assigned

• Quiz 5 (at the beginning of class)

Thu, Mar 31

Lecture #18: Analysis of Sequential Circuits

• Mano & Ciletti, Ch. 5.5

   

Tu, Apr 5

Lecture #19: State Machines

• Mano & Ciletti, Ch. 5.7

   

Thu, Apr 7

Lecture #20: Excitation tables, Controller Design, State Reduction

• Mano & Ciletti, Ch. 5.8

• Homework 5 due

• Homework 6 assigned

• Quiz 6 (at the beginning of class)

Tu, Apr 12

Lecture #21: Registers, Shift Registers, Register Design

• Mano & Ciletti, Ch. 6.1-6.2

   

Thu, Apr 14

Lecture #22:Counters

• Mano & Ciletti, Ch. 6.3-6.5

• Homework 6 due

• Homework 7 assigned

 

Tu, Apr 19

Lecture #23: Register Transfer Level Design

• Mano & Ciletti, Ch. 8.1-8.4

 

• Quiz 7 (at the beginning of class)

Thu, Apr 21

Lecture #24: Register Transfer Level Design

• Mano & Ciletti, Ch. 8.5

   

Tu, Apr 26

Lecture #25: Memory and Programmable Logic

• Mano & Ciletti, Ch. 7.1-7.4

• Homework 7 due

 

Thu, Apr 28

Lecture #26: Memory and Programmable Logic

• Mano & Ciletti, Ch. 7.5-7.8

   

Tu, May 3

Preview of Final

     

Wed, May 4

Prep day, No class

     
 

Final Exam

     

 

 

 

Lab schedule (tentative)

 

Date

Labs

Tue, Jan 26

Wed, Jan 27

Thu, Jan 28

Lab Overview and Policy, Introduction to Breadboard

Tue, Feb 2

Wed, Feb 3

Thu, Feb 4

Lab 1: Number systems

Tue, Feb 9

Wed, Feb 10

Thu, Feb 11

Lab 2: Logic Gates

Tue, Feb 16

Wed, Feb 17

Thu, Feb 18

Lab 3: Logical Expression I

Tue, Feb 23

Wed, Feb 24

Thu, Feb 25

Lab 4: Logical Expression II

 

Tue, Mar 1

Wed, Mar 2

Thu, Mar 3

Lab 5: Universal Gates

Tue, Mar 15

Wed, Mar 16

Thu, Mar 17

Lab 6: Adders

Tue, Mar 29

Wed, Mar 30

Thu, Mar 31

Lab 7: Decoders

Tue, Apr 5

Wed, Apr 6

Thu, Apr 7

Lab 8: Multiplexers

Tue, Apr 12

Wed, Apr 13

Thu, Apr 14

Lab 9: Flip Flops

Tue, Apr 19

Wed, Apr 20

Thu, Apr 21

Lab 10: Display Drivers

Tue, Apr 26

Wed, Apr 27

Thu, Apr 28

Lab 11: Counters

 

 

Acknowledgment

The slides and other materials for this course are in part based upon the materials from a number of people/sources, including:

·      Official website for the Mano & Ciletti text: Digital Design

·      Murat Yuksel from UNR: http://www.cse.unr.edu/~yuksem/

·      Mircea Nicolescu from UNR: http://www.cse.unr.edu/~mircea

·      Dwight Egbert from UNR: http://www.cse.unr.edu/~egbert

·      Michael Leverington from UNR: http://www.cse.unr.edu/~michael

 

ABET Criteria

 

Course Outcomes:

Students will demonstrate understanding of foundational logic and logical operations at the theoretical and gate/circuit level. They will be able to analyze logical conditions and develop gate-level circuits.

 

Course Outcomes:

The course outcomes are skills and abilities students should have acquired by the end of the course. These outcomes are defined in terms of the ABET Accreditation Criterion 3 Program Outcomes which are relevant to this course. All Criterion 3 Program Outcomes are listed in the next subsection and those relevant to this course are identified in the following table.

Program Outcomes

Course Outcomes

Assessment Methods/Metrics

 

Program Objectives Impacted

1

Students will identify the logical requirements of a given problem, be able to evaluate and optimize the logical requirements, and then design a circuit to execute the logical condition.

Individual demonstration of competence in class quizzes and exams, and in laboratory activities.

2, 3

2

Students will develop logical circuits in software simulators and on breadboards, and test and interpret the resulting logical outputs.

Individual and small group demonstration of competence in laboratory activities.

2, 3, 4

5

Students will demonstrate the ability to spontaneously generate computer logic analysis and circuit solutions to logic processing problems.

Individual demonstration of competence in class quizzes and exams.

2, 3

11

Students will develop logical circuits using software simulators and design and wire breadboard solutions.

Individual and small group demonstration of competence in laboratory activities.

2, 3, 4

 

Program Outcomes:

1.     an ability to apply knowledge of computing, mathematics, science, and engineering.

2.     an ability to design and conduct experiments, as well as to analyze and interpret data.

3.     an ability to design, implement, and evaluate a computer-based system, process, component, or program to meet desired needs, within realistic constraints specific to the field.

4.     an ability to function effectively on multi-disciplinary teams.

5.     an ability to analyze a problem, and identify, formulate and use the appropriate computing and engineering requirements for obtaining its solution.

6.     an understanding of professional, ethical, legal, security and social issues and responsibilities.

7.     an ability to communicate effectively with a range of audiences.

8.     the broad education necessary to analyze the local and global impact of computing and engineering solutions on individuals, organizations, and society.

9.     a recognition of the need for, and an ability to engage in continuing professional development and life-long learning.

10.  a knowledge of contemporary issues.

11.  an ability to use current techniques, skills, and tools necessary for computing and engineering practice.

12.  an ability to apply mathematical foundations, algorithmic principles, and computer science and engineering theory in the modeling and design of computer-based systems in a way that demonstrates comprehension of the tradeoffs involved in design choices.

13.  an ability to apply design and development principles in the construction of software systems or computer systems of varying complexity.

 

Program Objectives:

Within 3 to 5 years of graduation our graduates will:

1.     be employed as computer science and engineering professionals beyond entry level positions or be making satisfactory progress in graduate programs.

2.     have peer-recognized expertise together with the ability to articulate that expertise as computer science and engineering professionals.

3.     apply good analytic, design, and implementation skills required to formulate and solve computer science and engineering problems.

4.     demonstrate that they can function, communicate, collaborate and continue to learn effectively as ethically and socially responsible computer science and engineering professionals.

 

Course Information - Description - Prerequisites - Textbooks - Syllabus - Organization - Grading - Schedule, Notes & Assignments - Acknowledgment - ABET Criteria